Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!cs.utexas.edu!oakhill!mikes
From: mikes@oakhill.UUCP (Mike Schultz)
Newsgroups: comp.arch
Subject: Re: RISC & context switches
Message-ID: <1843@oakhill.UUCP>
Date: 13 Feb 89 15:30:26 GMT
References: <784@atanasoff.cs.iastate.edu> <640@m3.mfci.UUCP>
Reply-To: mikes@oakhill.UUCP (Mike Schultz)
Organization: Motorola Inc., Austin Tx.
Lines: 35

In article <640@m3.mfci.UUCP> colwell@mfci.UUCP (Robert Colwell) writes:
>In article <784@atanasoff.cs.iastate.edu> hascall@atanasoff.cs.iastate.edu (John Hascall) writes:
>
>>  I seem to recall there was (is?) a TI processor which had all of
>>  its registers in memory except 1 register which pointed to
>>  the other registers, so a context switch was just save/restore
>>  that one register.  Could a similar concept be implemented
>>  with all the registers in the chip?
>
>I think this was the TI 9900, the first 16-bit micro, which for some reason
>didn't seem to catch on very well.  

Probably because they couldn't figure out that if you gave hardware away to 
universities, then you grow people who knew TI when they graduated and took
that to the market place.  They also tended to be very business and industrial
oriented.  IMHO.

>It did indeed have all its registers in
>main memory.  And this isn't as dumb an idea as it first appears -- you need
>far fewer address bits to refer to a register than to memory addresses, so
>having "registers" that reside in memory is still better than no "registers"
>at all.  

Also consider that the 9900 was simply a single chip version of the TI 990 
mini computer.  I'm not sure of all my facts here, but when it was introduced,
the 990's CPU speed was not all that far from the memory speed, thus the
penality wasn't that much.  Later, as memory became slower compared to the CPU,
they cached the current register set into fast static RAM on the CPU board
and flushed them to memory as needed.  (I'm told that it made for some 
interesting hardware considering that programs could, and did, go to the 
memory address of a register to fiddle with the low order byte of the 
register.)

Mike Schultz
mikes@oakhill.UUCP