Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!nrl-cmf!ames!pasteur!ucbvax!hplabs!hpfcdc!hpgrla!paulc
From: paulc@hpgrla.HP.COM (@Paul Charlton)
Newsgroups: comp.lsi
Subject: Re: Circuit problem (medium difficulty)
Message-ID: <4300001@hpgrla.HP.COM>
Date: 8 Feb 89 22:29:46 GMT
References: <12762@obiwan.mips.COM>
Organization: Hewlett-Packard, Greeley, CO
Lines: 40



	this circuit answers both CMOS and nMOS specific
	implementations, as it uses only 2 nMOS transistors.

	Score = exp( 5 - (2) ) = 20.09

	here goes:

	5v power rail   -----------------
					|
				      ---
				      |
	Input Va    ------------------|	T1
				      |
				      ---
					|
					|--------------	Output Vout
					|
				      ---
				      |
	Input Vb    ------------------|	T2
				      |
				      ---
					|
					|
				       GND

	Since Ids1 = Ids2 (no output current...), and both T1 and T2
	are saturated, Vgs1 = Vgs2 = Vb,

	from which Vout = Va - Vgs1 = Va - Vb

	In implementations, you'd have to make sure that the power
	consumption was tolerable (ie: small W/L ratio...), since
	you have power = Isat * 5v.

 	Paul Charlton

	{ paulc@hpgrai.hp.com } | { hplabs!hpgrai!paulc }