Xref: utzoo comp.os.os9:369 comp.sys.m6809:999
Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!purdue!decwrl!dneast.dec.com!burke_vern
From: burke_vern@dneast.dec.com (Mah biscuits 're burnin'!-Yosemite Sam,_Roger Rabbit_)
Newsgroups: comp.os.os9,comp.sys.m6809
Subject: timing fix
Message-ID: <8902080504.AA07308@decwrl.dec.com>
Date: 8 Feb 89 05:04:03 GMT
Organization: Digital Equipment Corporation
Lines: 25


	After tinkering for a while with my coco III,I belive I've
	found the root cause of a lot of the timing problems in it.
	I tried most of the "sparklie"fixes to no avail.The scs gating
	fix might work for peripherals,but it treats the symptom and
	not the disease.
	Aparrently,RS wanted to save space and money by eliminating
	a NOR gate chip in the address decoder circuit.The address
	decoder(74ls138) controls cts,scs,and some of the memory
	decoding.On the original coco,a NOR gate was used to gate
	e clock and the c select line together.This was used for one
	enable(the other was tied active all the time).On the coco III,
	both enables are tied active all the time.This means the select 
	lines aren't allowed to settle before the output line is selected!
	I added a NOR gate to my coco III to duplicate the original coco's
	gating for the 74ls138.My performance peripherals dual mode
	controller now functions perfectly with my unmodified coco-xt
	and I have yet to see a single "sparklie".I'm not sure if this
	modification will work without the "A" GIME,but it seems to
	have done the trick for me.If anyone is interested,email me
	a message and I'll mail you more specific directions.If anyone
	uses this mod,I'd be interested to hear the results.


								vern