Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!decwrl!decvax!tektronix!tekig5!wayneck From: wayneck@tekig5.PEN.TEK.COM (Wayne Knapp) Newsgroups: comp.arch Subject: Re: quest for breakthroughs (long) Keywords: architecture, breakthrough, technology Message-ID: <3780@tekig5.PEN.TEK.COM> Date: 14 Feb 89 16:44:25 GMT References: <740@tetons.UUCP> Organization: Tektronix Inc., Beaverton, Or. Lines: 45 Well, I'll jump. I'm interested in computer animation. The biggest problem I face is memory bandwidth. Compared to that everything else is minor second-order effects. So here is what I'd like to see: 1. RISC is nice since it has lots of registers, but bad because there are too many instruction to be excuted to do anything. 2. CISC is nice in that one instruction can do a lot of things with one little instruction, but you only get a handful of registers. So you always hitting memory to get your data. 3. Memory caches are nice but, there is very little control over what stays in the cache. So what I'd like to see is a two fold solution: 1. RCISC - Register enhanced CISC. Take something like 680xx, paste in a couple kbytes of registers that can also hold code. Use a few of the unimplemeted opcodes to give access to the new memory bank. This would allow one to really reduce memory accesses durning intense interactive graphics by putting some of the routines into the RAM bank and also common data would go in there. Also since this would be on chip RAM, programs would excute much quicker there and data access would be fast. Along with this would have to be a tagging system to allow tasks to grab chunks to RAM bank so you could allow old-fashion multitasking programs to run. 2. OS cops to stop all OS writers from using the RAM bank. Power to the programmers, keep the OS to just the standard registers. This would keep overhead low, and even allow cheap context switches. Let's not waste great hardware on PIG style OSs. After all the only good OS is one that doesn't get in your way. Wayne Knapp