Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uflorida!gatech!gitpyr!loligo!mccalpin
From: mccalpin@loligo.uucp (John McCalpin)
Newsgroups: comp.arch
Subject: Re: String length hardware
Message-ID: <7289@pyr.gatech.EDU>
Date: 15 Feb 89 14:28:02 GMT
References: <21822@ames.arc.nasa.gov>
Sender: news@pyr.gatech.EDU
Reply-To: mccalpin@loligo.UUCP (John McCalpin)
Organization: Supercomputer Computations Research Institute
Lines: 26

In article <21822@ames.arc.nasa.gov> lamaster@ames (Hugh LaMaster) writes:
>The Cyber 205 provides an address/length form of descriptor in hardware
>which works with all vector data types.  Unfortunately, the length field
>is only 16 bits long, so the longest string you could have would be of
>65535.  This really hurts on floating point arrays, though, because now
>some arrays are that big.  (In the late 60's, when the ISA was defined,
>512K of Core Memory was a BIG NUMBER.) 
>  Hugh LaMaster, m/s 233-9,  UUCP ames!lamaster

The decision to use a 16-bit length field might be repeated if the
instruction set were redesigned today.  There are a number of tradeoffs
between vector length and paging time on a virtual memory machine which
make longer vector lengths potentially expensive.  At the very least,
very long vector lengths might require the addition of a third (larger)
page size for the virtual memory system to deal with.

Current software automatically segments arithmetic loops into
65535-element chunks, similar to the 64-element strip-mining on the
Cray's. The overhead for this on the 205/ETA-10 is negligible.  I do
not think that the current compiler knows about the vector instruction
for byte-oriented string-searching, but the user can get at it with an
explicit hardware call.
----------------------   John D. McCalpin   ------------------------
Dept of Oceanography & Supercomputer Computations Research Institute
mccalpin@masig1.ocean.fsu.edu		mccalpin@nu.cs.fsu.edu
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