Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!ames!lll-winken!vette!brooks
From: brooks@vette.llnl.gov (Eugene Brooks)
Newsgroups: comp.arch
Subject: Re: Don't look back
Message-ID: <20667@lll-winken.LLNL.GOV>
Date: 20 Feb 89 20:53:05 GMT
References: <747@atanasoff.cs.iastate.edu> <28200275@mcdurb> <4290@pt.cs.cmu.edu> <13582@winchester.mips.COM>
Sender: usenet@lll-winken.LLNL.GOV
Reply-To: brooks@maddog.llnl.gov.UUCP (Eugene Brooks)
Organization: Lawrence Livermore National Laboratory
Lines: 34

In article <13582@winchester.mips.COM> mash@mips.COM (John Mashey) writes:
A long, and well founded, analysis of why superminis are being squeezed out
of their performance niche from the rear by VLSI based machines.

This article is conservative at best, there are a whole lot of users of Cray
time buying the latest VLSI based machines as a more cost effective alternative.
With the latest microprocessors these machines are within 1/5th of the
performance of a Cray supercomputer for all but the most highly vectorized
codes.  For scalar codes the performance of these microprocessors can be
as high as 1/2 of a Cray-1S.  The performance of supercomputers has stagnated
in the last 10 years, with only about one factor of 2 in performance per CPU
having been achieved.  Needless to say, while traditional computer technology
has stagnated performance wise,  microprocessors have really accelerated as
their designers have learned the basics of pipelining and have had enough gates
on a chip to support full functionality.  Supercomputer vendors shudder when
we show them where the best microprocessors stand in relation to mainframes
for the Livermore Loops and point out where their performance will be a year
or two from now.  Next years microprocessors will meet or beat the scalar
performance of supercomputers, and I expect at least one or two further
doublings in speed of these parts before they reach an asymptote.  At that
point you will start to see higher bandwidth memory connections for these
parts (as opposed to a simple stall on a cache miss model) and the distinction
between a micro and a supercomputer architecture will be completely blurred.

Supercomputers at this point will still exist, but they will be built out of
modestly large numbers of VLSI processors (shared memory or otherwise depending
on the application).  The only hope for supercomputer vendors is to start using
higher levels of integration than they currently use so the cost of their
hardware can be reduced and their reliability increased.



Is the news software incompatible with your mailer too?
brooks@maddog.llnl.gov, brooks@maddog.uucp, uunet!maddog.llnl.gov!brooks