Path: utzoo!utgpu!utstat!jarvis.csri.toronto.edu!mailrus!ames!oliveb!apple!baum
From: baum@Apple.COM (Allen J. Baum)
Newsgroups: comp.arch
Subject: Re: General-purpose architectures and symbolic languages
Message-ID: <26233@apple.Apple.COM>
Date: 22 Feb 89 22:46:46 GMT
References: <28113@ucbvax.BERKELEY.EDU> <7051@polya.Stanford.EDU>
Reply-To: baum@apple.UUCP (Allen Baum)
Organization: Apple Computer, Inc.
Lines: 19

[]
>In article <7051@polya.Stanford.EDU> wilson@carcoar.Stanford.EDU (Paul Wilson) writes:
>Even if the Newest generation won't fit in the cache, you should be
>able to avoid swapping a lot of cache blocks out by telling the cache
>hardware if they only contain garbage.  (i.e., force them to appear
>clean, so they won't be written back, or tell the cache to "create"
>a block without actually reading in the corresponding block from
>main memory).  It seems that this would cut cache-memory traffic by
>approximately half (?) for the Newest generation.
>

Both IBM and HP have patents on that sort of thing:
4,719,568  Hierarchical memory system including separate cache memories
          for storing data and instructions (IBM)
4,713,755  Cache memory consistency control with explicit software instructions
           (HP)
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