Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!sharkey!atanasoff!hascall
From: hascall@atanasoff.cs.iastate.edu (John Hascall)
Newsgroups: comp.arch
Subject: Re: In defense of (cough) IBM (was: In defense of the VAX)
Message-ID: <834@atanasoff.cs.iastate.edu>
Date: 23 Feb 89 14:52:33 GMT
References: <4592@tekgvs.LABS.TEK.COM> <cXvqKRy00Wo=0TV282@andrew.cmu.edu> <1226@husc6.harvard.edu> <123@endeavor.edsdrd.eds.com>
Reply-To: hascall@atanasoff.cs.iastate.edu (John Hascall)
Organization: Iowa State U. Computer Science Department, Ames, IA
Lines: 28

In article <123@endeavor.edsdrd.eds.com> rnd@edsdrd.eds.com (Randy Diffenderfer) writes:
>In article <1226@husc6.harvard.edu>, reiter@babbage.harvard.edu (Ehud Reiter) writes:
>> ...
>> This contrasts with the
>> IBM 370-class machines, which suffer greatly from lack of address space,
>> which *is* very much an annoyance to the programmer and even the end-user.

>In the 'olden' days [pre-XA or pre-ESA], this was significantly true.
>I think IBM jocks would defend XA's 2GB/as and ESA's 4TB (can you say
>"how the h*** can I afford the backing store?") as having relieved that
>annoyance.  NOW the annoyance is figuring out how to efficiently use the
>room! :-)


   Well, the register-displacement addressability scheme is still a
   pain in the *ss.

   For those of you not familiar with the IBM/3x0 scheme, basically
   all memory is accessed via a register and a displacement (sounds
   not too bad so far...), BUT, the displacement is only 12 bits!
   You can only address 4K per base register!!

   First it was "8 ENIACS (or whatever) will be enough for all the
   computing needs of the world forever", then "4K! who could use
   4K??", etc...  Have we learned yet?

John Hascall
ISU Comp Center