Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!csd4.milw.wisc.edu!jgreco
From: jgreco@csd4.milw.wisc.edu (Joe Greco)
Newsgroups: comp.sys.cbm
Subject: Re: SEQ file access speedup
Message-ID: <1019@csd4.milw.wisc.edu>
Date: 15 Feb 89 15:47:59 GMT
References: <1606.23F8D15A@isishq.FIDONET.ORG>
Sender: news@csd4.milw.wisc.edu
Reply-To: jgreco@csd4.milw.wisc.edu (Joe Greco)
Organization: Totally Unorganized.  A Real Mess.  Award-winning.
Lines: 52

In comp.sys.cbm article <1606.23F8D15A@isishq.FIDONET.ORG>, izot@f171.n221.z1.FIDONET.ORG (Geoffrey Welsh) wrote:
]
] > From: jgreco@csd4.milw.wisc.edu (Joe Greco)
] > Message-ID: <955@csd4.milw.wisc.edu>
] > Device(s)               Time    Filesize CPS    %speed
] > ----------------------- ------- -------- ------ ------
] > Regular 1541/C64        01:35.2    33453    351    100
] > C64/BusCard II/8050     00:31.8    30234    952    271
] > C64/Custom MSD/8050     00:17.3    30234   1745    497
] > C64/RAMDOS 3.2/1750     00:12.2    38760   3188    908
] 
]   Add to the list (result from my memory):
] 
]   C128/C64-Link II/SFD                       1900

Relative comparisons between my MSD interface and a Link I showed the
MSD to be faster.  And as I recall, the Link I was a bit faster than
the Link II.  Ahhhh.... well....

]   HyperPET/D9060                             Bloody fast - I'll get specs!
] 
]   The C128 was running at 2 MHz.
] 
]   The "HyperPET" is a 4 MHz 4032.

Wish I had a HyperPET.  Of course, I also wish I had a D9090.  Then
again, I wish... oops better not start on that line again.

]   The IEEE-488-1979 spec says that the data transfer rate shall not exceed 1 
]megabyte per second, but the handshake is designed to slow the transfers down 
]to the slowest selected device on the bus. Since it takes several 1 MHz clock 
]cycles to program the I/O chips to send the handshake signals, megabyte per 
]second speeds are way out of the question.

That's what I meant (the spec itself)....  I realize, of course, that
such speeds are NOT possible at these clock rates.

]   There is also the question of how quickly the data can be "lifted" from the 
]disk. Even with most IEEE drives' 2-processor design, there is a severe limit 
]to the speed with which the data can be put on the bus.

It would be nice for a hard disk!  grin grin grin

]   Nevertheless, some sort of automated hardware handshake and more tightly 
]coded ROMs in the drive would lead to vastly improved performance.

And more tightly coded software on the computer.
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