Path: utzoo!utgpu!watmath!isishq!f171.n221.z1.FIDONET.ORG!izot
From: izot@f171.n221.z1.FIDONET.ORG (Geoffrey Welsh)
Newsgroups: comp.sys.cbm
Subject: Re: Faster IEEE-488 devices (was Re: SEQ file access speedup)
Message-ID: <1698.240886E5@isishq.FIDONET.ORG>
Date: 23 Feb 89 23:42:19 GMT
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 > From: stephenc@tekgen.BV.TEK.COM (Stephen Coan )
 > Message-ID: <4125@tekgen.BV.TEK.COM>
 >
 > The 68488 chip is buggy.  It also adheres to the 1975 version of the
 > standard, not the later versions (1978, 1980, 1987).
 
   You have to keep in mind that the IEEE-488 bus used by Commodore was a 
non-standard extension.
 
 > The bus does support bus speeds of up
 > to 1Mbyte per second, usually with a DMA controller involved.
 
   The Commodore implementations discussed here do handshaking via parallel 
I/O lines controlled by a 1 MHz 6502 (i.e. no hardware support beyond the 
MC3446 drivers). While discussing the mandated limits of IEEE-488 performance 
is certainly interesting, it isn't really applicable here.
 
 > The other
 > choices avaiable are the TI-TMS9914A and the INTEL-8291A chips.  The
 > interface chips to the IEEE-488 most used are the 75160, 75161 chips by TI
 > or National.
 
   I'm not familiar with the TI or NSC chips (I may have been and forgotten 
since); the Intel chip set, while probably usable for a Commodore-oriented 
application, is far too expensive for most of the peoplelooking to play around 
in this field.
 
 > I have
 > also participated in the generation of the newest IEEE versions of the
 > venerable GPIB standard, the ANSI/IEEE Std 488.1 and 488.2 1987.
 >
 > If anyone wants details on problems, drop me a line and I'll send you
 > information.  That information does not need to be expounded here.
 
   I don't suppose you could put me on the mailing list for a copy of those 
standards? I'd really appreciate being brought up-to-date.
 
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