Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!csd4.milw.wisc.edu!leah!bingvaxu!sunybcs!boulder!stan!dce From: dce@stan.UUCP (David Elliott) Newsgroups: comp.sys.mac Subject: Re: New Mac Rumours Message-ID: <506@salgado.stan.UUCP> Date: 26 Feb 89 23:49:07 GMT References: <41a2364a.a590@mag.engin.umich.edu> <70755@ti-csl.csc.ti.com> Reply-To: dce@salgado.UUCP (David Elliott) Organization: Solbourne Computer Inc., Longmont, Colorado Lines: 42 In article <70755@ti-csl.csc.ti.com> holland@m2.UUCP (Fred Hollander) writes: >In article <41a2364a.a590@mag.engin.umich.edu> billkatt@caen.engin.umich.edu (billkatt) writes: >>is in an object oriented format. Yes, it is doubtful that they will do a >>rewrite in Pascal, since the system is currently written in Assembly >>language, and RISC chips are optimized for C. > >This is very interesting. I don't have the strongest background in >hardware architecture, but, could you please explain how a processor >could be optimized for a specific high level language? Well, the statement isn't entirely true. There exist RISC chips that are optimized for C, but RISC doesn't imply C optimization. The MIPS chip, for example, is more optimized for Unix in general than C. After all, you don't need virtual memory just for C, and the R[23]000 have a TLB just for that reason. Anyway, to answer the question, RISC means "reduced instruction set computer", and also tends to imply a reduced number of addressing modes as well. Since you are limited in instructions and addressing modes, you need to pick those which are beneficial to your application. Since C compilers don't have a "string" primitive, it is unlikely that a C compiler would be able to use string instructions, so you might leave these out. You can also examine a large set of "typical" programs and see how many registers you are likely to need. The architects and designers take this information and use it to efficiently utilize the chip area. In the MIPS architecture, the goal was to keep the pipeline from stalling, so instructions were implemented so that they could be executed in a single cycle (note: this doesn't mean that instructions take only one cycle to execute). Also, the extra chip area was used to make the multiplier faster and to implement TLB registers for virtual memory. In other words, you optimize for the final application by putting together a group of experts. In the case of a Unix processor, you get C compiler and Unix kernel experts. If you were working on an imbedded controller chip, you would get people who understand devices and device drivers. -- David Elliott ...!pyramid!boulder!stan!dce "Splish splash, I was rakin' in the cash" -- Eno