Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!cornell!uw-beaver!rice!sun-spots-request From: mcvax!philce!richard@uunet.uu.net (Richard Bishopp) Newsgroups: comp.sys.sun Subject: Re: Is RISC faster Message-ID: <305@philce.UUCP> Date: 22 Feb 89 10:37:59 GMT References: <15686@mimsy.UUCP> Sender: usenet@rice.edu Organization: Philips Consumer Electronics Lines: 29 Approved: Sun-Spots@rice.edu Original-Date: 10 Feb 89 09:22:42 GMT X-Sun-Spots-Digest: Volume 7, Issue 164, message 2 of 9 X-Issue-Reference: v7n142 In article <15686@mimsy.UUCP> folta@tove.umd.edu (Wayne Folta) writes: >A co-worker and I were debating why RISC machines might be faster than >CISC (traditional) machines. I had just read an article that did some >UNIX benchmarks, and found RISC machines ran about 3 times faster than >CISC (a 68030-based machine, for example). > >The question is why. The name RISC is actually a bit of a misnomer (or misacronym?). RISC should be RICC - Reduced Instruction Cycle Computer. The only way for a computer to go faster is to execute an instruction in a shorter time. If you look at the CPU cycle time on a benchmark you should find the RISC machines have a considerably shorter CPU cycle. Another reason why RISC can be better is that the design of the CPU is simpler. In other words you can optimize some parts of the CPU to go faster. A limitation in a micro-coded machine is the cycle time to access the microcode memory and decode the instruction. Most RISC machines have some sort of internal ROM (or PLA) to decode instructions which is inherently faster than accessing off-chip memory of microcode. If the chips also have a large number of registers to store data you can reduce the external accesses to memory - besides memory is easy to make on a chip. I learnt all this while working at Acorn Computers (England) on the design of the ACORN RISC machine which I think is now being used by Olivetti in their laser printers etc. I have lots of references if anyone is interested. Richard Bishopp