Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!cornell!batcomputer!braner
From: braner@batcomputer.tn.cornell.edu (Moshe Braner)
Newsgroups: comp.sys.transputer
Subject: Re: C004 Dynamic Switching
Summary: Look out for a slow-down of transfer rate...
Message-ID: <7443@batcomputer.tn.cornell.edu>
Date: 21 Feb 89 21:50:07 GMT
References: <8902211646.53060@eurokom.ie>
Reply-To: braner@tcgould.tn.cornell.edu (Moshe Braner)
Organization: Cornell Theory Center, Cornell University, Ithaca NY
Lines: 11

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One disadvantage of using a 2-layer C004 switching network is that,
going through 3 C004's in a row, the data transfer rate on the link
is reduced by a half (from about 1.8 MBytes/sec to 0.9).  At least
that's the case on our Niche board (T800-20s).  I have it on good authority
that using only 1 or 2 C004s on one link does not have this affect:
the acknowledge bits get back just in time.  Did anybody try that?
Is there any solution for the layered approach (e.g. faster switch-chips)?

- Moshe