Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!decwrl!labrea!rutgers!ucla-cs!loving
From: loving@lanai.cs.ucla.edu (Mike Loving)
Newsgroups: comp.arch
Subject: Re: So, can you really fab 10**6 transistors now?
Message-ID: <21667@shemp.CS.UCLA.EDU>
Date: 13 Mar 89 21:56:53 GMT
References: <7392@polya.Stanford.EDU> <62230001@hpl-opus.HP.COM>
Sender: news@CS.UCLA.EDU
Reply-To: loving@cs.ucla.edu (Mike Loving)
Organization: UCLA Computer Science Department
Lines: 27

In article <62230001@hpl-opus.HP.COM> poulton@hpl-opus.HP.COM (Ken Poulton) writes:
>>                                        Failing that, are there any other
>> similarly sized chips that have made it out of the lab?
>
>Sure.  In *1982*, HP presented (at ISSCC) a 32bit CPU with 
>450K transistors.  It was fabbed in a 1.3um NMOS process.  Yield was
>microscopic at the time of the paper, but soon came up to quite
>good levels.  It was the CPU for the HP 9000 series 500, which
>I think we still sell.
>
>
>Ken Poulton
>poulton@hplabs

Two things to be said about this:

a)  there were 9k words of 38 bit microcode on the chip - thus there were
about 360 k fets in ucode.

b) 1.3u process?  the minimum feature size was 1u the minimum drawn channel
length was a little bit more.


-------------------------------------------------------------------------------
Mike Loving          loving@lanai.cs.ucla.edu
                     . . . {hplabs,ucbvax,uunet}!cs.ucla.edu!loving
-------------------------------------------------------------------------------