Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!purdue!gatech!mcdchg!motmpl!ron
From: ron@motmpl.UUCP (Ron Widell)
Newsgroups: comp.arch
Subject: Re: So, can you really fab 10**6 transistors now?
Summary: You bet!
Keywords: densities geometries silicon-compilers
Message-ID: <1161@motmpl.UUCP>
Date: 15 Mar 89 23:52:12 GMT
References: <7392@polya.Stanford.EDU>
Reply-To: ron@motmpl.UUCP (Ron Widell)
Distribution: usa
Organization: Motorola Semiconductor, Minneapolis, MN
Lines: 29

In article <7392@polya.Stanford.EDU> maslen@polya.Stanford.EDU (Thomas Maslen) writes:
>I *think* this is comp.arch material...

>I got into a lively discussion last night with a couple of people who claimed
>that nobody in the US could fabricate a chip like the N-10 (excuse me, i860;
>did I get it right?) with any useful sort of a yield.  As supporting evidence
>they mentioned (first I'd heard of it) that Motorola had been unpleasantly
>surprised by the difficulty of producing fully working 88K chips, which is a

>	- don't spill your company secrets to me or the net (of course).

>    Thomas Maslen				    maslen@polya.stanford.edu

That sort of transistor count has been available on a single chip (at least
as a lab curiosity) since roughly 1980. The problem back then was packaging
(device geometries being what they were, the chips were *BIG*). Today, such
densities are eminently doable (you might say we're betting the company on
it :^)).

The 88k problems were not due to chip density, but to the fact that we were
trying to debug two (inter-related) things at once. Remember, the 88k was
not a hand-packed design, but the output of a silicon compiler; so we
had to debug both the definitions going into the compiler as well as the
compiler itself. (Can you say "Chase your tail"? :^)).
-- 
Ron Widell, Field Applications Eng.	|UUCP: {...}mcdchg!motmpl!ron
Motorola Semiconductor Products, Inc.,	|Voice:(612)941-6800
9600 W. 76th St., Suite G		| I'm from Silicon Tundra,
Eden Prairie, Mn. 55344 -3718		| what could I know?