Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!ucsfcgl!pixar!gbuce From: gbuce@pixar.UUCP (George Buce) Newsgroups: comp.sys.amiga Subject: Re: LUCAS board fix (long)(technical) Keywords: A500/A2000 Reset Message-ID: <3316@pixar.UUCP> Date: 14 Mar 89 22:33:58 GMT References: <3291@pixar.UUCP> <6232@cbmvax.UUCP> Reply-To: gbuce@pixar.UUCP (George Buce) Organization: Pixar -- Marin County, California Lines: 43 In article <6232@cbmvax.UUCP> daveh@cbmvax.UUCP (Dave Haynie) writes: >in article <3291@pixar.UUCP>, gbuce@pixar.UUCP (George Buce) says: >> Since we know that the first DTACK* comes from within the Amiga during the >> call to ROM directly after reset, and the Amiga specs state that you aren't >> allowed to return DTACK* before the beginning of S4, we know that the DTACK >> signal will fall somewhere during the S4 state. > >No, actually, we don't KNOW that (I'm not sure if it's true for an unexpanded >A1000, but it's not true for an unexpanded A500 or A2000). The bus master >(the 68020, in this case) can't ACT on DTACK* before the falling edge of >S4, which is where DTACK* should be sampled by a device like LUCAS. > --- >With that said, your fix probably has a good chance of working on an A1000 >with no memory added, based on the way DTACK* is actually generated by the >1000. With external memory added, there's no guarantee you'll stay synced, Actually, since we're only interested in re-generating C1* + C3* on the LUCAS board and only need to sync it once (after the initial reset), I don't see how the external memory boards can be a problem. I haven't done any developing since the A500/A2000 were introduced, but since the autoconfig boards aren't enabled directly after a reset, I can't imagine that there would be a glitch during S3. The only thing we're interested is the *very first call* the 68000 makes to the Amiga, which is going to be a read to the ROM. Does Fat Agnus respond with DTACK* during S3? If so, then my 'U9 fix' won't work on an A500 or A2000 (thought the LUCAS wasn't designed for them...) Will a soft reset still generate a call to the ROMs before autobooting off of RAD:? (Brad, correct me if I'm wrong, but) The LUCAS board seems to handle refresh wait state de-synchronisation by extending the wait until it is in sync with an original S5 state again... >Dave Haynie "The 32 Bit Guy" Commodore-Amiga "The Crew That Never Rests" > {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: D-DAVE H BIX: hazy > Amiga -- It's not just a job, it's an obsession George (8{> +-----------------------------------------------------------------------------+ | George Buce (8{> | Disclaimer: Of course I don't represent Pixar. | |...!ucbvax!pixar!gbuce | Discourager: They don't use Amigas... 8{( | +-----------------------------------------------------------------------------+ | Boys and Girls, can you say 80 Mbytes per second? (hard disk transfer speed)| | How about $7,500? Sure... I knew you could... (*actual milage may vary) | +-----------------------------------------------------------------------------+