Checksum: 34629 Path: utzoo!utgpu!anakin From: anakin@gpu.utcs.toronto.edu (Anakin Research) Date: Wed, 15-Mar-89 14:47:58 EST Message-ID: <1989Mar15.144758.12325@gpu.utcs.toronto.edu> Organization: University of Toronto Computing Services Newsgroups: comp.sys.amiga Subject: Re: LUCAS board fix (long)(technical) References: <3291@pixar.UUCP> <6232@cbmvax.UUCP> <3316@pixar.UUCP> Reply-To: anakin@gpu.utcs.UUCP (Anakin Research) Keywords: A500/A2000 Reset >>daveh@cbmvax.UUCP (Dave Haynie) writes: >>in article <3291@pixar.UUCP>, gbuce@pixar.UUCP (George Buce) says: >>> Since we know that the first DTACK* comes from within the Amiga during the >>> call to ROM directly after reset, and the Amiga specs state that you aren't >>> allowed to return DTACK* before the beginning of S4, we know that the DTACK >>> signal will fall somewhere during the S4 state. >> >>No, actually, we don't KNOW that (I'm not sure if it's true for an unexpanded >>A1000, but it's not true for an unexpanded A500 or A2000). The bus master >>(the 68020, in this case) can't ACT on DTACK* before the falling edge of >>S4, which is where DTACK* should be sampled by a device like LUCAS. >> --- >>With that said, your fix probably has a good chance of working on an A1000 >>with no memory added, based on the way DTACK* is actually generated by the >>1000. With external memory added, there's no guarantee you'll stay synced, >Actually, since we're only interested in re-generating C1* + C3* on the LUCAS >board and only need to sync it once (after the initial reset), I don't see how >the external memory boards can be a problem. I haven't done any developing >since the A500/A2000 were introduced, but since the autoconfig boards aren't >enabled directly after a reset, I can't imagine that there would be a glitch >during S3. The only thing we're interested is the *very first call* the 68000 >makes to the Amiga, which is going to be a read to the ROM. Does Fat Agnus >respond with DTACK* during S3? If so, then my 'U9 fix' won't work on an A500 >or A2000 (thought the LUCAS wasn't designed for them...) Will a soft reset >still generate a call to the ROMs before autobooting off of RAD:? (Brad, >correct me if I'm wrong, but) The LUCAS board seems to handle refresh wait >state de-synchronisation by extending the wait until it is in sync with an >original S5 state again... Yes George, you are correct! LUCAS can startup on the wrong side of the C1+*C3 cycle. and your fix corrects that problem. Once your in sync, the circuitry on the LUCAS board takes care to sync up to the S5 state as you surmised. This is a startup problem which appears to affect about 10% of the Amiga's out there, judging by the reports I receive. I have yet to have someone with this problem not have it eliminated by your fix. Turning the machine off and on again a couple of times also works, but that's pretty tacky. Brad