Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!hplabs!hpfcdc!hpislx!hplvli!boyne
From: boyne@hplvli.HP.COM (Art Boyne)
Newsgroups: comp.sys.hp
Subject: Re: HP 9825A (was Was *this* the first RISC chip?)
Message-ID: <1430001@hplvli.HP.COM>
Date: 16 Mar 89 23:59:09 GMT
References: <16274@mimsy.UUCP>
Organization: Loveland Inst. Div
Lines: 27

Regarding the HP 9825, most of what Carl Wuebker posted was correct, but
a few points can be made:

  The BPC was *not* a RISC machine.  It was based on the classic mini-
computer architecture of the HP2100, which itself was closely related to
the old PDP-8 style machines.  It was implemented in NMOS, not the
silicon-on-sapphire that Chris Torek suggested (that processor was the
short-lived MC^2).

  The BPC did initiate the instruction fetch, but, in true co-processor
fashion, each chip did an instruction decode to determine if it was the
proper "execution unit".  The BPC did do integer multiply/divide.  The
EMC was strictly for floating point.  It didn't do complete multiplies
or divides, only provided subset instrctions which were part of a longer
software routine - something like 15 or so FMUL instructions were required
to multiply 2 floating point numbers.

  The BPC *was* used without either the IOC or EMC in at least the 9871
daisy wheel printer, introduced at about the same time as the 9825 itself.
Also, I believe the BPC/IOC combination (without the EMC) was used in the
HP64000 development systems.

Credentials:  I hired on to HP 2 months after the 9825 was introduced, and
spent the next year+ doing a 9830-BASIC language ROM set for it (called
the 9831).

Art Boyne, boyne@hplvla.hp.com