Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!cornell!batcomputer!chow
From: chow@batcomputer.tn.cornell.edu (Christopher Chow)
Newsgroups: comp.sys.mac
Subject: Re: Orchid MacSprint II
Message-ID: <7538@batcomputer.tn.cornell.edu>
Date: 11 Mar 89 23:40:28 GMT
References: <22536@tiger.oxy.edu>
Reply-To: chow@tcgould.tn.cornell.edu (Christopher Chow)
Distribution: usa
Organization: Cornell Theory Center, Cornell University, Ithaca NY
Lines: 23

In article <22536@tiger.oxy.edu> hammersslammers1@oxy.edu (David J. Harr) writes:
|Has anyone noticed the new product advertised in the April MacUser called
|MacSprint II? It is made by Orchid Technologies for the Mac II. It is a RAM
|cache board that fits between the 68020 processor and the socket and
|provides the processor with 32k of high speed memory to use as a RAM cache.
|The RAM cache uses 55 nanosecond DRAM and puts the most recently used

Does the MacSprint II interface with both the PMMU and the CPU sockets, or
does it just plug into the CPU socket.  It seems that you may run into a
problem if you're using the PMMU (say under AU/X, Virtual, or Sys 7) if it
plugs in between the 020 and the motherboard.

BTW, just how does the Marathon 030 deal with the PMMU socket in the Mac
II?  

Christopher Chow
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