Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!csd4.milw.wisc.edu!lll-winken!ames!elroy!peregrine!ccicpg!cci632!rit!ritcv!jeb1265
From: jeb1265%ritcv@cs.rit.edu
Newsgroups: comp.sys.mac
Subject: Serial Communications
Message-ID: <990@cs.rit.edu>
Date: 14 Mar 89 16:57:13 GMT
Sender: news@cs.rit.edu
Reply-To: jeb1265%ucss@cs.rit.edu (Jim Beveridge)
Distribution: na
Organization: Rochester Institute of Technology, Rochester, NY
Lines: 10

I am trying to program the Zilog 8530 Serial Communications Controller
to do SDLC synchronous mode.  The technical documentation from Zilog
is absolutely terrible.  If anyone has any experience with doing this,
please send me mail.  I have made some progress on initializing the
chip, and figuring out the proper sequence to send and receive a frame,
but I would rather not reinvent the wheel.

	Thanks in advance,

	     .. Jim ..