Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!bloom-beacon!apple!vsi1!wyse!mips!rogerk From: rogerk@mips.COM (Roger B.A. Klorese) Newsgroups: comp.arch Subject: Re: Re: MicroVAX emulation Message-ID: <15665@winchester.mips.COM> Date: 21 Mar 89 20:39:41 GMT References: <807@microsoft.UUCP> <92634@sun.uucp> <13322@steinmetz.ge.com> <1133@auspex.UUCP> <12000@haddock.ima.isc.com> <1368@husc6.harvard.edu> <679@scaup.cl.cam.ac.uk> <12035@haddock.ima.isc.com> <687@scaup.cl.cam.ac.uk> <37515@bbn.COM> Reply-To: rogerk@mips.COM (Roger B.A. Klorese) Organization: MIPS Computer Systems, Sunnyvale, CA Lines: 28 In article <37515@bbn.COM> slackey@BBN.COM (Stan Lackey) writes: >The MICROvax architecture does NOT include >string instructions, other than MOVC3 (and MOVC5?). Some DEC-supplied >software includes emulation to ease the transition. Generating the >in-line emulation using a reduced instruction set is NO PROBLEM, right? There *IS NO* MicroVAX architecture. There is a MicroVAX *implementation* of the VAX architecture, which implements some instructions in software. This is very different. >1. The uVAX is NOT said to implement the VAX architecture. I've never seen this claimed. >2. MIPS, AMD, Intel, Motorola, Sun, etc. don't do your work for you either. > I don't understand why it is OK for the RISC suppliers to supply > reduced instruction sets, but if DEC does it it's evil. Ours is not "reduced" as in an incompatible subset of our other products. Our *architecture* is designed around instruction leanness. If we were to release a system on which some of our instructions would not run in either hardware or provided software, that would not be reduced, that would be STUPID. -- Roger B.A. Klorese MIPS Computer Systems, Inc. {ames,decwrl,pyramid}!mips!rogerk 928 E. Arques Ave. Sunnyvale, CA 94086 rogerk@servitude.mips.COM (rogerk%mips.COM@ames.arc.nasa.gov) +1 408 991-7802 "Committing a gross indecency shows you do things in a big way." - J. Broughton