Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!ames!oliveb!apple!jrg
From: jrg@Apple.COM (John R. Galloway)
Newsgroups: comp.arch
Subject: Re: RISC as a "technology window"?
Summary: When we are overflowing with spare silicon for cpu chips, we will
	 just put multiple cpus on one chip.
Message-ID: <27681@apple.Apple.COM>
Date: 22 Mar 89 04:16:17 GMT
References: <1552@vicom.COM> <15690@cup.portal.com> <1562@vicom.COM> <15702@clover.ICO.ISC.COM>
Organization: Galloway Research
Lines: 18

In article <15702@clover.ICO.ISC.COM>, rcd@ico.ISC.COM (Dick Dunn) writes:
> In article <37196@bbn.COM>, slackey@bbn.com (Stan Lackey) writes:
> > RISC is indeed a technology window, driven largely by the amount of
> > stuff you can fit in a chip...
> 
> OK, fair 'nuff.  As soon as we can put an unlimited amount of stuff on a
> chip (and do it without increasing delays or other limitations), we'll be
> beyond that technology window, I guess...

Well actually only while the "extra" space is less than a full cpu, as soon
as it is we will just get multiple cpus on a chip and they may well still be
RISC oriented.  In fact with the extra cost of packaging, I could imagine
that as soon as this point is approached all extras will be stripped off to
squeeze the extra one in.
apple!jrg	John R. Galloway, Jr.       contract programmer, San Jose, Ca

These are my views, NOT Apple's, I am a GUEST here, not an employee!!