Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!nrl-cmf!ames!pasteur!ucbvax!tut.cis.ohio-state.edu!rutgers!att!homxb!houxs!beyer From: beyer@houxs.ATT.COM (J.BEYER) Newsgroups: comp.arch Subject: Re: delay lines for memory Summary: other hard-to-program memory technologies... Message-ID: <1257@houxs.ATT.COM> Date: 17 Mar 89 18:36:25 GMT References: <21976@lll-winken.LLNL.GOV> <28411@ucbvax.BERKELEY.EDU> Organization: AT&T BL Holmdel NJ USA Lines: 19 In addition to delay line memory, some machines used magnetic drum memories (e.g., IBM 650). The trouble with delay line memory and most drum memory is that you have to wait until the address you want comes along out of the memory. By Murphy's law, the one you want just went by, so you have to wait until it comes around again on the guitar. The larger the memory, the longer it is and the longer you have to wait. There are ways around this, sort-of. What was done to the 650 was that each instruction had 2 addresses, one where the data came from or went to, and one, the address where the next instruction was to come from. A clever assembler was used that knew the execution times of the instructions, and arranged to place the next instruction at a location that would just be coming around as the current one finished. Fun, huh! -- Jean-David Beyer A.T.&T., Holmdel, New Jersey, 07733 houxs!beyer