Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!ukma!husc6!yale!mfci!rodman
From: rodman@mfci.UUCP (Paul Rodman)
Newsgroups: comp.arch
Subject: Re: RISC as a "technology window"?
Message-ID: <726@m3.mfci.UUCP>
Date: 26 Mar 89 01:07:25 GMT
References: <1552@vicom.COM> <15690@cup.portal.com> <1562@vicom.COM> <15702@clover.ICO.ISC.COM> <27681@apple.Apple.COM> <15695@winchester.mips.COM> <22974@ames.arc.nasa.gov> <51@microsoft.UUCP> <22202@shemp.CS.UCLA.EDU>
Sender: rodman@mfci.UUCP
Reply-To: rodman@mfci.UUCP (Paul Rodman)
Organization: Multiflow Computer Inc., Branford Ct. 06405
Lines: 17

In article <22202@shemp.CS.UCLA.EDU> marc@cs.ucla.edu (Marc Tremblay) writes:

>I also believe that putting the Integer unit and the FPU on the same 
>chip makes sense. These two units have to communicate quickly....
                     ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
I don't understand why.

In most f.p. codes the integer unit generates 
addresses and program counter values, neither of which are needed
by the f.p. unit.  What the f.p. unit needs, on the other hand, is
a decent bandwidth to cache and/or memory. 


    Paul K. Rodman 
    rodman@mfci.uucp
    __... ...__    _.. .   _._ ._ .____ __.. ._