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From: bcase@cup.portal.com (Brian bcase Case)
Newsgroups: comp.arch
Subject: Re: RISC as a "technology window"?
Message-ID: <16231@cup.portal.com>
Date: 25 Mar 89 20:01:52 GMT
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>The general consensus seems to be that
>the primary determinant is the physical implementation, but that the logical
>architecture heavily influences to what extent RISCy implementation techniques
>can be used.

Right, except that I don't agree that the primiary determinant is the
physical implementation.  A RISC is an architecture that *permits* a *clean*,
high-performance implementation.  A CISC architecture might be able to use
some high-performance implementation tricks, but cleanliness is next to
RISCyness.  The cleanliness becomes very important when superscalar
implementations, and probably multiple-processor-per-chip implementations,
are designed.

>The other issue is the granularity of instruction semantics.  The greater
>the granularity, the more opportunities there are for code optimization.
>It also increases the generality of the instruction set, making it more
>likely that all instructions will be used by (and useful to) more applications.
>The greater the difference in semantic level (primitiveness) between
>the machine instructions and high-level language statements, the easier it is
>to have high-quality code generation for a wide variety of languages.

I've never thought to use such pro-active phrasing in explaining the
advantage to software of simplicity, but I like it.  This is an excellent
way of saying it.