Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!csd4.milw.wisc.edu!lll-winken!uunet!mcvax!jack From: jack@cwi.nl (Jack Jansen) Newsgroups: comp.arch Subject: Re: How does the i860 compare as a Message-ID: <7977@boring.cwi.nl> Date: 28 Mar 89 13:20:58 GMT References: <222551@<1989Mar25> <46500057@uxe.cso.uiuc.edu> Sender: news@cwi.nl Organization: AMOEBA project, CWI, Amsterdam Lines: 30 In article grunwald@flute.cs.uiuc.edu writes: >In article <46500057@uxe.cso.uiuc.edu> mcdonald@uxe.cso.uiuc.edu writes: > .... > > Resolved: Layered software functionality is sluggish, and therefore > undesirable. > >I'd state it as `layered software sacrifices speed for portability, and >therefore keep CPU architecture employed.' Actually, layered software doesn't *have* to be sluggish. However, it takes quite a bit of work to build an efficient layered product. You have to design an initial version, use it for a while, measure it, redesign it (possibly moving features between levels), use it for a while, measure it, etc etc etc. Measuring should also include making instruction traces across all levels, especially for the 'most-common-case'. This will often lead you to functionality that is cheaper to provide at a different level. Also, using caching at each level can also give you a layered product a performance that is only slightly worse than that of a non-layered one. This method should give you good performance and a maintainable product. Unfortunately, it will be years in designing.......... -- -- Een volk dat voor tirannen zwicht | Oral: Jack Jansen zal meer dan lijf en goed verliezen | Internet: jack@cwi.nl dan dooft het licht | Uucp: mcvax!jack