Path: utzoo!utgpu!utstat!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!pasteur!helios.ee.lbl.gov!ncis.llnl.gov!lll-winken!uunet!cbmvax!jesup From: jesup@cbmvax.UUCP (Randell Jesup) Newsgroups: comp.arch Subject: Re: RISC as a "technology window"? Message-ID: <6417@cbmvax.UUCP> Date: 29 Mar 89 01:23:29 GMT References: <1552@vicom.COM> <15690@cup.portal.com> <1562@vicom.COM> <15702@clover.ICO.ISC.COM> <27681@apple.Apple.COM> <15695@winchester.mips.COM> <22974@ames.arc.nasa.gov> <13404@steinmetz.ge.com> Reply-To: jesup@cbmvax.UUCP (Randell Jesup) Organization: Commodore Technology, West Chester, PA Lines: 16 In article <13404@steinmetz.ge.com> davidsen@crdos1.UUCP (bill davidsen) writes: > There will continue to be a demand for processors with a very high >instruction rate (call them RISC if you will), and also for processors >which will perform a given task faster with limited memory bandwidth. Quite true. Not everyone designs workstations bought solely by larger corporations. There is _signifigant_ demand for CPUs that are a) fairly cheap - say current '030/881 (16MHz) pricing, and b) do the most _work_ given a specific memory bandwidth, determined by the speed of jelly-bean memory parts - say 100-120ns currently, and without expensive external caches. You could sell a lot of CPUs like that. -- Randell Jesup, Commodore Engineering {uunet|rutgers|allegra}!cbmvax!jesup