Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!ames!lll-lcc!lll-winken!uunet!portal!cup.portal.com!bcase
From: bcase@cup.portal.com (Brian bcase Case)
Newsgroups: comp.arch
Subject: Re: Unaligned Accesses (was Re: How to use silicon)
Message-ID: <16456@cup.portal.com>
Date: 30 Mar 89 19:03:36 GMT
References: <37196@bbn.COM> <1989Mar16.190043.23227@utzoo.uucp> <24889@amdcad.AMD.COM> <355@bnr-fos.UUCP> <13@microsoft.UUCP> <362@bnr-fos.UUCP> <59@microsoft.UUCP> <844@bnr-rsc.UUCP> <37924@bbn.COM>
Organization: The Portal System (TM)
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>I can't imagine any processor that would go to the trouble of taking
>an interrupt at any arbitrary time.

The ability to take an interrupt any time falls out of a simple design.
RISCs as a class are an example.

>>>I don't quite understand the problem.  Alignment restrictions are almost
>>>zero hassle in most code, are enforced by compilers even on processors
>Then, why were the suppliers (IBM, DEC, Motorola, etc) pressured so much
>by programmers to add this feature in the first place?  What has changed?

what has changed:  1) the level of expected performance (mostly through
competition), 2) the size of main memory, and 3) the quality of both
hardware and software engineers (the processor designers now know what
the cost of arbitrary alignment really is, so do software designers).

>>>and simplify the hardware tremendously.
>This is a major part of the point!  If it were a tremendous savings,
>it would never have been done in the first place.  Trust me, if you
>had a gate-level schematic of a CPU in front of you, you could look at
>it for weeks and never find the unaligned logic.  So many pieces of it
>you need anyway: rotators to fetch bytes/words, stalls to deal with
>non-zero wait state memory systems, traps to handle page faults.

You missed the point.  The point is that a fetch of an item that spans
a natural boundary requires *two* fetches.  This is slower and requires
annoying special-case consideration in the design.  It complicates
things, paving the way for design errors, and lengthens some critical
paths.  Knowing that two fetches, i.e., extra time, is required for
unaligned accesses, software engineers that are concerned with the
performance of their code won't do it anyway, even if the hardware
supports it!  Those that aren't concerned with the performance of their
code are welcome to solve the problem anyway they like:  use a processor
that supports unalignment, emulate it in software, ....