Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!bloom-beacon!apple!vsi1!daver!mips!synthesis!len
From: len@synthesis.Synthesis.COM (Len Lattanzi)
Newsgroups: comp.arch
Subject: Re: Unaligned Accesses
Message-ID: <16372@mips.mips.COM>
Date: 1 Apr 89 09:05:49 GMT
References: <4618@pt.cs.cmu.edu>
Sender: news@mips.COM
Reply-To: len@synthesis.synthesis.com (Len Lattanzi)
Organization: Synthesis Software Solutions Inc, Sunnyvale, CA
Lines: 19

In article <4618@pt.cs.cmu.edu> lindsay@MATHOM.GANDALF.CS.CMU.EDU (Donald Lindsay) writes:
:
:So far, people have brought up two hardware solutions:
:
: - 1. The CPU can just do it.
: - 2. The CPU can complain (interrupt) when someone tries to do it.
:
:No one has mentioned the third alternative.
:
[ load low byte(s) into low part of register, leave top alone ]

The MIPS R2000 has this instruction and its cohort load high bytes into
high part of register leaving low alone. I'm not positive but I believe that
f77 will generate them for suitably unaligned common members.


 Len Lattanzi (len@Synthesis.com) <{ames,pyramid,decwrl}!mips!synthesis!len>
 Synthesis Software Solutions, Inc.				1 408 991 0367
 292 Commercial Avenue, Sunnyvale, California 94086