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From: night@pawl.rpi.edu (Trip Martin)
Newsgroups: comp.os.cpm,sci.electronics
Subject: Re: New processor rumour
Message-ID: <1055@rpi.edu>
Date: 31 Mar 89 21:01:21 GMT
References: <240@ericom.ericsson.se>
Sender: usenet@rpi.edu
Organization: ECSE Dept, RPI, Troy, NY
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In article <240@ericom.ericsson.se> etxbrfa@kk32.ericsson.se (Bj|rn Fahller TT/MLG) writes:
>I've heard some rumours that Zilog recently has released a NEW version of the
>Z80 processor. The new version should (according to the rumours) have a largely
>expanded instruction set, with multiplication, division, SIO routines, etc...
>
>Is this actually the case? I thought Z80 was out years ago.
>
You aren't thinking about the Z280?  I'm pretty sure it's out on the market
now.  A friend of mine has preliminary specs dating back to 1984 (it was 
the Z800 back then).

Here's a brief rundown of the new architecture from what I remember:

   * 16 bit bus
   * 16meg addressibility, although programs still only see the 64k
     address range of the Z80.  There are 16 page registers for mapping.
     It can either be done by 8k pages with separate I&D mappings, or
     4k pages with no distinction between I&D.
   * Supervisor and user modes
   * Support for traps and exceptions, including stack overflow, page fault,
     illegal instruction, etc.
   * Builtin UART
   * Hardware programmable wait-states (0-15)

If anyone wants more info, I'll try to get it...

Trip Martin
night@pawl.rpi.edu
night@uruguay.acm.rpi.edu