Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!husc6!rutgers!cbmvax!fred
From: fred@cbmvax.UUCP (Fred Bowen)
Newsgroups: comp.sys.cbm
Subject: Re: C128,C128D, and C128C??? Questions
Message-ID: <6358@cbmvax.UUCP>
Date: 21 Mar 89 16:50:37 GMT
References: <1856.2423BC06@isishq.FIDONET.ORG>
Reply-To: fred@cbmvax.UUCP (Fred Bowen)
Organization: Commodore Technology, West Chester, PA
Lines: 91


	Hindsight is 20-20, of course... but 4 years ago we had a very
	tight schedule (less than a year for a new system, OS, several
	new custom chips, new peripherals (REUs, 1571), etc.) and a very
	strict cost target.  Some folks call it amusing, some call it a
	nightmare, and some call it the best 8-bit system built.  From
	my perspective, no machine is ever "finished."  Unfortunately,
	whatever system is at hand when the window of opportunity opens
	is what you get- just a slice of its evolution.

In article <1856.2423BC06@isishq.FIDONET.ORG> (Geoffrey Welsh) writes:
>(1) Why didn't the C128 include 64K video RAM from the beginning? Considering 
>that the VDC was designed to handle 2 4416s or 8 4164s (but has also proved 
>workable with 2 4464s), it seemed the logical thing to do...

	When production was first ramping up, indeed the 8563 had problems
	with bitmap screens- hell, it could not even do text screens right.
	The system ROMs were release before I had bug-free silicon (hence
	some "workaround" code still exists in the Kernel).  In fact, the
	product specification called for 80-column text only, using a 6845
	(which was always our fallback if the 8563 was not working in time.
	Incidentally, the 8563 was to be used for text on both the C128 and
	the C900).  By the time the C128 was released to production, the bugs
	had been worked out of the 8563 but nothing was done to test the
	functionality of the bit map modes since they were not part of the
	product spec.  Coupled with the lack of graphic support in the OS,
	16K was more than enough video RAM for text support and kept the cost
	closer to target.  Why 80-column text at all?  The C128 was a sort of
	"joining" of the C64 and PET/8032/B-series lines.

>(2) Given that the 128's MMU could handle FOUR 64K banks of memory, why was 
>that capability not used? 41256s were a commodity chip at the time and I find 
>it difficult to believe that Commodore was afraid that the C64 wouldn't clear 
>out its inventories of 4164s...

	A 256K machine was part of the original plan, as evidenced by the MMU
	documentation and provisions in the operating system, but the system
	was already beyond the target cost.  Hence the shift to expandability
	via the REUs.  In my opinion this is better in most repects anyway;
	the performance of the DMA device gives the system a real kick.  One
	of the chief problems of the C128 is the banking via the MMU- it's
	slow and awkward.  The current MMU does not support 256K- a revision
	to the chip would be necessary, although a prototype C256 was built
	(I have it :-).  

>(3) I find it incredibly amusing that the Z80 runs at an effective 2 MHz even 
>though the VIC-II is enabled because it runs 4 MHz, 2 cycles on and 2 off. 
>Would producing a 4 MHz 8502 have ben so expensive that a similar scheme could 
>not have been used to allow 128 mode to support 2 MHz, even in 40-column mode? 
>Better yet, why does there not seem to be a way to shut doen the VIC-II chip 
>in CP/M mode and run the Z80 flat out at 4 MHz (Jeez, it would have been nice 
>to do that in C128 mode as well)...

	You don't understand the bus interface at all.  The "shared bus" is
	the very heart of the VIC video processor.  Furthermore, a Z80 bus
	cycle is much different from a 65xx family bus cycle, especially its
	interface to the data bus (the Z80 actually does run during the VIC
	cycle (AEC low) but the data bus interfaces with it only during AEC
	high).  In 2MHz mode, the VIC is removed from the system, and can
	devote the full clock cycle to the processor.  So your idea is not
	without merit- and in fact a prototype with a 4MHz Z80 was built
	(I have that one, too :-).

> >Interlaced screen resolutions up to 640x600 (that's six full Doodle screens
> > complete with color) are possible.
>   That's what I thought from reading the VDC specs, but I wasn't able to 
>achieve it. Since I am not a video specialist (that is probably the area where 
>I lack experience most), I figured at first that it was me. However, I have 
>been told by several people (including a fellow named Jeff Solomon, who claims 
>to be a "Commodore rep") that there is a bug in the VDC that prevents bitmap 
>and interlace modes from being enabled at the same time.

	The "bug" was in the 8563's designer's docs, not in the chip.  As
	soon as I had the chance to add more video memory (the US version of
	the C128D), I did.  Still could not add the extra banks of memory,
	faster processors, ACIA, etc. though.  Even lost the damn fan (but
	I kept the vents & mounting holes for ya).  I even extended BASIC 7.0
	graphic commands to support the 8563 bit map mode, but could not get
	the okay to release them (yes, I have that system too, which also
	happens to have a built-in ACIA :-).

>   Thanks for the info, Fred.

	You're welcome.
--
-- 
Fred Bowen			uucp:	{uunet|rutgers|pyramid}!cbmvax!fred
				arpa:	cbmvax!fred@uunet.uu.net
				tele:	215 431-9100

Commodore Electronics, Ltd.,  1200 Wilson Drive,  West Chester,  PA,  19380