Xref: utzoo comp.arch:8956 comp.sys.intel:775 Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!csd4.milw.wisc.edu!lll-winken!uunet!ncrlnk!rd1632!friedman From: friedman@rd1632.Dayton.NCR.COM (Lee G. Friedman) Newsgroups: comp.arch,comp.sys.intel Subject: Re: i860 overview (long) Message-ID: <733@rd1632.Dayton.NCR.COM> Date: 23 Mar 89 22:33:15 GMT References: <807@microsoft.UUCP> <92634@sun.uucp> <13322@steinmetz.ge.com> <1989Mar8.183152.2057@utzoo.uucp> Reply-To: friedman@rd1632.UUCP (Lee G. Friedman) Organization: NCR Research & Development, Dayton, Ohio Lines: 104 CALL FOR PAPERS AND REFEREES HAWAII INTERNATIONAL CONFERENCE ON SYSTEM SCIENCES - 23 Processors and Systems Architecture: The Converging Design Space KAILUA-KONA, HAWAII - JANUARY 2-5, 1990 The Architecture track of HICSS-23 will contain a special set of papers focusing on a broad selection of topics in the area of Processor and Systems Architectures. Given the current and predicted future state of technology available for computers, there is an explosion of new architectural features being employed in processors to serve the needs of the systems architecture community. Furthermore, systems architects, taking advantage of these features, look to add other features currently not available in off-the-shelf silicon, and the cycle continues. There are several questions which arise: 1. Does the behavior of the built-in features fulfill the requirement as expected from the systems architects point of view? 2. How does a processor architect design processors for systems? a.How does the processor architect decide on the features to be included? b.What system level assumptions, both hardware and software, does the processor architect make in developing a processor with a set of features? c.What 3. How does the systems architect employ the processor? a.How does the system architect evaluate a processor for use in a particular system? b.What tradeoffs are made in using certain processor technology? c.What impact does a processor with features have on the system? The goal of this day long program (called a minitrack) at the HICSS- 23 conference is to show, through the papers, the convergence and divergence of processor and systems architecture. That is where things go right and were there is still a disparity between the chips, boards, boxes, and software (what we call the semantic gap). The format for the minitrack is as follows: The intention is to get three good papers on three important processor architectures. These papers should be a detailed description of the architecture of the chip (or chips), as well as, addressing the questions above. Each of the three processor architecture papers will be followed by two systems architecture papers. These papers should describe the system and how the processor in question was used to provide the end solution. Again, this should also address the questions above. Thus, in total, we will have nine papers. This is followed by an open discussion of the convergence and divergence of processor and systems architecture. Papers are invited that may be practical applications, research machines, or theoretical. Papers can deal with systems and VLSI technologies. Those papers selected for presentation will appear in the Conference Proceedings which are published by the Computer Society of the IEEE. HICSS-23 is sponsored by the University of Hawaii in cooperation with the ACM, the Computer Society, and the Pacific Research Institute for Information Sciences and Management (PRIISM). INSTRUCTIONS FOR SUBMITTING PAPERS: Manuscripts should be 22-26 typewritten, double-spaced pages in length. Do not send submissions which are significantly shorter. Papers must not have been previously presented or published, nor currently submitted for journal publication. Each manuscript will be put through a rigorous refereeing process. Manuscript papers should have a title page that includes the title of the paper, full name of the author(s), affiliation(s), complete physical and electronic address(es), telephone number(s) and a 300-word abstract of the paper. DEADLINES * A 300-word abstract is due by April 15, 1989 * Feedback to author concerning abstract by May 5, 1989 * Six copies of the manuscript are due by June 1, 1989 * Notification of accepted papers by August 15, 1989 * Accepted manuscripts, camera-ready, due by September 23, 1989 SEND SUBMISSIONS AND QUESTIONS TO Lee G. Friedman NCR Corporation 1601 S. Main Street MS PCD-5 Dayton, OH 45479 (513) 445-3594 e-mail: lee.friedman@dayton.ncr.com