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From: bier@cottage.cs.wisc.edu (George Bier)
Newsgroups: comp.sys.sequent
Subject: interrupt handling on the Symmetry system
Message-ID: <7367@spool.cs.wisc.edu>
Date: 27 Mar 89 17:47:34 GMT
Sender: news@spool.cs.wisc.edu
Reply-To: bier@cottage.cs.wisc.edu (George Bier)
Organization: U of Wisconsin CS Dept
Lines: 16


I am hoping someone could enlighten me on how a processor is selected for
handling interrupts on a Symmetry system.  I believe that on the Balance
system, the SLIC interface was used to select the processor currently running
the lowest priority process.   What is done on the newer machines?   In 
addition, if you happen to know how other multiprocessors systems besides 
the Symmetry (for example Alliants) select the processor to handle an 
interrupt, I would appreciate hearing about that too.  Any references 
would also be appreciated.

thanks,

--george

Internet:	bier@cs.wisc.edu
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