Path: utzoo!telly!attcan!dptcdc!jarvis.csri.toronto.edu!mailrus!rutgers!labrea!mcnc!rti!xyzzy!bert!meissner
From: meissner@bert.dg.com (Michael Meissner)
Newsgroups: gnu.gcc.bug
Subject: Re: GCC 1.34 core dump for 80386
Message-ID: <4568@xyzzy.UUCP>
Date: 27 Mar 89 16:48:29 GMT
References: <8903170318.AA17624@ucscc.UCSC.EDU>
Sender: usenet@xyzzy.UUCP
Reply-To: meissner@xyzzy.UUCP (Michael Meissner)
Distribution: gnu
Organization: Data General (Languages @ Research Triangle Park, NC.)
Lines: 98

In article <8903170318.AA17624@ucscc.UCSC.EDU> sco!seanf@UCSCC.UCSC.EDU writes:
| With gcc-1.34, for the 80386 (compiled by pcc) under Xenix 2.3.1:
| When I tried adding the movs instruction, defined as:
| 
| (define_insn "movstrqi"
|   [(set (match_operand:BLK 0 "general_operand" "D")
| 		(match_operand:BLK 1 "general_operand" "S"))
|    (use (match_operand:SI 2 "general_operand" "c"))
|    (use (reg:SI 2))
|    (use (reg:SI 4))
|    (use (reg:SI 5))]

In 1.34, movstr* and cmpstr* were redefined to take 4 arguments
(destination, source, length, and alignment).  Redefine your pattern
as follows:

(define_insn "movstrqi"
  [(set (match_operand:BLK 0 "general_operand" "D")
		(match_operand:BLK 1 "general_operand" "S"))
   (use (match_operand:SI 2 "general_operand" "c"))
   (use (match_operand:SI 3 "immediate_operand" "i"))
   (use (reg:SI 2))
   (use (reg:SI 4))
   (use (reg:SI 5))]

You might want to consider using clobber for the final use's.  Here is
the definition from my Motorola 88K md file that allocates the
temporary registers dynamically and defines movstrsi.

(define_expand "movstrsi"
  [(parallel [(set (mem:BLK (match_operand:BLK 0 "general_operand" ""))
		   (mem:BLK (match_operand:BLK 1 "general_operand" "")))
	      (use (match_operand:SI 2 "arith32_operand" "rI"))
	      (use (match_operand:SI 3 "int5_operand" "K"))
	      (clobber (match_dup 4))
	      (clobber (match_dup 5))
	      (clobber (match_dup 6))
	      (clobber (match_dup 7))])]
  ""
  "
{
  /* Make sure no alignment more than 4 is given */
  if (INTVAL (operands[3]) > 4)
    operands[3] = gen_rtx (CONST_INT, VOIDmode, 4);

  /* punt on variable or large moves by calling the library.  For non-int
     items, we make the threshold much smaller, since there is a good chance
     that the things may actually be aligned to a higher degree, and the
     library routine should check for that.... */

  if (GET_CODE (operands[2]) != CONST_INT ||
      (INTVAL (operands[3]) < 4 &&
       INTVAL (operands[2]) > 9 * INTVAL (operands[3])))
    {				/* hand craft a call to memcpy/bcopy */
#ifdef TARGET_MEM_FUNCTIONS
      emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \"memcpy\"),
			 VOIDmode, 3,
			 XEXP (operands[0], 0), Pmode,
			 XEXP (operands[1], 0), Pmode,
			 operands[2], Pmode);
#else
      emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \"bcopy\"),
			 VOIDmode, 3,
			 XEXP (operands[1], 0), Pmode,
			 XEXP (operands[0], 0), Pmode,
			 operands[2], Pmode);
#endif

      DONE;
    }

  /* peel off MEM:BLK node to get pointer */
  operands[0] = copy_to_mode_reg (Pmode, XEXP (operands[0], 0));
  operands[1] = copy_to_mode_reg (Pmode, XEXP (operands[1], 0));

  /* allocate the temps output_block_move needs */
  operands[4] = gen_reg_rtx (SImode);
  operands[5] = gen_reg_rtx (SImode);
  operands[6] = gen_reg_rtx (SImode);
  operands[7] = gen_reg_rtx (SImode);
}")


(define_insn ""
  [(set (mem:BLK (match_operand:SI 0 "register_operand" "+r"))
	(mem:BLK (match_operand:SI 1 "register_operand" "+r")))
   (use (match_operand:SI 2 "arith32_operand" "=rI"))
   (use (match_operand:SI 3 "int5_operand" "K"))
   (clobber (match_operand:SI 4 "register_operand" "=r"))
   (clobber (match_operand:SI 5 "register_operand" "=r"))
   (clobber (match_operand:SI 6 "register_operand" "=r"))
   (clobber (match_operand:SI 7 "register_operand" "=r"))]
  ""
  "* return output_block_move (operands);")

Michael Meissner, Data General.
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