Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!husc6!m2c!wpi!jhallen From: jhallen@wpi.wpi.edu (Joseph H Allen) Newsgroups: comp.arch Subject: Re: RT/PC Unaligned Accesses Message-ID: <1685@wpi.wpi.edu> Date: 4 Apr 89 04:52:50 GMT References: <4618@pt.cs.cmu.edu> <4628@pt.cs.cmu.edu> <28664@ucbvax.BERKELEY.EDU> Reply-To: jhallen@wpi.wpi.edu (Joseph H Allen) Organization: Worcester Polytechnic Institute, Worcester, MA. USA Lines: 25 In article <28664@ucbvax.BERKELEY.EDU> jas@ernie.Berkeley.EDU (Jim Shankland) writes: >The cases for faulting on unaligned instructions and data accesses >(e.g., MIPS, 68010, et al.) rather than dealing with them correctly >in hardware (e.g., VAX) is stronger than the case for silently >forcing the 1 or 2 LSB's to 0, as the RT/PC does. Sure, correct >programs will run correctly; but correct programs of any respectable >size are almost unheard of. Consider the following reductio ad >absurdum: . . . >Jim Shankland >jas@ernie.berkeley.edu > >"Blame it on the lies that killed us, blame it on the truth that ran us down" Also, consider the problem in the other direction: Some programs may work correctly on the RT because the RT silently zeros several bytes. This program will not, of course, work on a "non-braindamaged" machine. On the other hand, the RT's doing this is in sync with the general large-company philosphy of getting you "locked into using our machine forever otherwise your gonna pay a lot of money for new software." "That's not a bug; it's a feature!"