Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uflorida!ukma!husc6!think!barmar
From: barmar@think.COM (Barry Margolin)
Newsgroups: comp.arch
Subject: Re: looking for >32-bit address space
Message-ID: <39054@think.UUCP>
Date: 11 Apr 89 16:29:32 GMT
References: <1032@myrias.UUCP> <1989Apr3.164538.277@utzoo.uucp> <2516@scolex.sco.COM> <1989Apr7.194933.4861@utzoo.uucp> <2534@scolex.sco.COM>
Sender: news@think.UUCP
Reply-To: barmar@kulla.think.com.UUCP (Barry Margolin)
Organization: Thinking Machines Corporation, Cambridge, MA
Lines: 25

In article <2534@scolex.sco.COM> seanf@scolex.UUCP (Sean Fagan) writes:
>  The segments [on the Cyber-180] are *very* similar to the way
>the '386 does it, except that you can use more registers for segment
>registers on the Cyber (and, I presume, Multics).

Multics hasn't had dedicated segment registers for a long time (about
fifteen years).  The Multics processor had separate segment registers
(called base registers) and offset registers (called pointer
registers), which were grouped in pairs that could be used as full
address registers.  In the early 70's the followon processors (the
6000 series) replaced each segment and offset register with a full
pointer register.  It isn't necessary to use separate instructions to
load the segment and offset portions of a pointer register (unless you
want to, of course, when the situation is appropriate).  Programs,
even those written in assembly language, that don't care about the
fact that memory is segmented generally don't notice (the only time
they might notice is if they try to allocate an array that doesn't fit
in a segment, i.e. larger than about 1MB).


Barry Margolin
Thinking Machines Corp.

barmar@think.com
{uunet,harvard}!think!barmar