Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!csd4.milw.wisc.edu!lll-winken!uunet!convex!rigel!swarren
From: swarren@rigel.uucp (Steve Warren)
Newsgroups: comp.sys.amiga.tech
Subject: Re: New stuff
Keywords: 680x0's and computers in general
Message-ID: <973@convex.UUCP>
Date: 4 Apr 89 00:35:23 GMT
References: <2017.AA2017@panchax> <846@savax.UUCP>
Sender: news@convex.UUCP
Reply-To: swarren@rigel.UUCP (Steve Warren)
Organization: Convex Computer Corporation, Richardson, Tx.
Lines: 48

In article <846@savax.UUCP> thompson@savax.UUCP (thompson mark) writes:
>In article <2017.AA2017@panchax> richard@panchax.gryphon.COM (Richard J. Sexton) writes:
>>2) Math chips
>>	From _EDN February 16, 1989, page 21_  Weitek has announced
>>	the Abacus 3168 numeric coprocessor. When teamed with a
>>	25 Mhz '030 it gives 6M Whetstones and 1.5M Flops Linpack
>>	(Double Precision). It seems to be a multiply/divide square
>>	root unit, only, so you would still need a 68881 for
>>	transcendental functions.
>Somewhat impressive, but why settle for less. The Intel 80860 (N-10) will
>absolutely blow the doors off the Weitek part and just about anything else.
>It is a 64 bit RISC processor with an internal FPU capable of 80 MFLOPS or
>120 MOPS (millions of operations per second). Intel claims that peak 
		[similar performance claims deleted]
>--------------------------------------------------------------------------
>|      Mark Thompson                                                     |
>|      decvax!savax!thompson       Designing high performance graphics   |
>|      (603)885-9583               silicon today for a better tomorrow.  |
>--------------------------------------------------------------------------

Yes, all these are wonderful, but I'd like to see a 68040 LUCAS :-).
Full Harvard architecture (1.25 Million transistors) on one chip.
That means an internal 68882 and MMU.  Simple (relatively) hardware
design, with software to drive it already in place.  2 MFLOPs (that
is a lot of performance, even if it looks small next to 80 MFLOPs).

There are disadvantages and trade-offs to every approach.  Sure the Intel
chip is fast (how fast is it really :-), but it's really a whole new processor.
And 64 bit data busses add $$ to memory boards pretty fast. Performance costs.
Personally, as long as I'm using an Amiga, I like the elegance and unity of
a coprocessor that appears transparent to the rest of the system.  The same
software (OK, there are library differences, but that's been discussed in
another notestream) can run on an inexpensive 500, or scream on the decked
out '020 and '030 equipped systems.

As I said, everything is a trade off.  If you've got to have 80 MFLOPs
(near-CRAY performance) then by all means go for it.  That's what we do
where I come from :-).  But the average Amiga user will have trouble finding
applications that will keep him waiting at 2 MFLOPs.

PS - if you want to talk about it more, you might want to move over to
     comp.sys.amiga, since this isn't a technical discussion.

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