Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!ames!lll-winken!uunet!microsoft!w-colinp
From: w-colinp@microsoft.UUCP (Colin Plumb)
Newsgroups: comp.sys.amiga.tech
Subject: Re: New stuff
Keywords: i860
Message-ID: <1233@microsoft.UUCP>
Date: 5 Apr 89 05:32:01 GMT
References: <2017.AA2017@panchax> <846@savax.UUCP> <1619@dretor.dciem.dnd.ca>
Reply-To: w-colinp@microsoft.uucp (Colin Plumb)
Organization: very little
Lines: 17

king@dretor.dciem.dnd.ca (Stephen King) wrote:
> Excuse me if this seems like a foolish question, but how do they get
> 120 MOPS with a (maximum) 50MHz clock speed? I could understand an
> instruction executed on both the rising and falling edges of the clock, but
> that is still less than 120 MOPS. 

They have a special mode where the processor reads 64 bits of instruction
per cycle and executes one intger op and one f.p. op.  And the f.p. op
can be a multiply-accumulate, which they count as two FLOPs.  Thus, 150
MOPS peak at 50 MHz.  In reality, of course...

I posted more information than you probably want to know about the
N-10/i860/80860 to comp.arch a while ago.  Mail me if you want a copy.
-- 
	-Colin (uunet!microsoft!w-colinp)

"Don't listen to me.  I never do." - The Doctor