Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!decwrl!decvax!savax!thompson
From: thompson@savax.UUCP (thompson mark)
Newsgroups: comp.sys.amiga.tech
Subject: Re: New stuff
Keywords: 680x0's and computers in general
Message-ID: <865@savax.UUCP>
Date: 13 Apr 89 19:26:04 GMT
References: <2017.AA2017@panchax> <846@savax.UUCP> <1619@dretor.dciem.dnd.ca>
Reply-To: thompson@savax.UUCP (thompson mark)
Organization: Disturbing Products Inc.
Lines: 26

In article <1619@dretor.dciem.dnd.ca> king@dretor.dciem.dnd.ca (Stephen King) writes:
>In article <846@savax.UUCP> thompson@savax.UUCP (thompson mark) writes:
>>Somewhat impressive, but why settle for less. The Intel 80860 (N-10) will
>>absolutely blow the doors off the Weitek part and just about anything else.
>>It is a 64 bit RISC processor with an internal FPU capable of 80 MFLOPS or
>>120 MOPS (millions of operations per second). [...]
>
>Excuse me if this seems like a foolish question, but how do they get
>120 MOPS with a (maximum) 50MHz clock speed? I could understand an
>instruction executed on both the rising and falling edges of the clock, but
>that is still less than 120 MOPS. 
>
>/* the opinions herein may be flawed, but then they are only mine */
>-- 
>       ...!utzoo!dretor!king       or       king%dretor@zorac.dciem.dnd.ca

Not foolish at all. Actually, the 120 MOPS is achieved on the 40MHz part
by simultaneously executing a floating point add, floating point multiply,
and an integer ALU operation in a single clock cycle. This doesn't even
include whatever operation the graphics block is performing. Consequently,
the 50 MHz part can attain 150 MOPS.
--------------------------------------------------------------------------
|      Mark Thompson                                                     |
|      decvax!savax!thompson       Designing high performance graphics   |
|      (603)885-9583               silicon today for a better tomorrow.  |
--------------------------------------------------------------------------