Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!pasteur!ames!amdahl!oliveb!felix!dhw68k!thecloud From: thecloud@dhw68k.cts.com (Ken McLeod) Newsgroups: comp.sys.mac.programmer Subject: Re: XFCN/XCMD string in LSC C v3.0 Summary: What about processor data caching? Keywords: A4-relative data, blessing or curse? Message-ID: <22027@dhw68k.cts.com> Date: 11 Apr 89 08:48:53 GMT References: <12964@dartvax.Dartmouth.EDU> <28737@ucbvax.BERKELEY.EDU> <12968@dartvax.Dartmouth.EDU> <6944@hoptoad.uucp> Reply-To: thecloud@dhw68k.cts.com (Ken McLeod) Organization: Wolfskill & Dowling residence; Anaheim, CA (USA) Lines: 37 In article <6944@hoptoad.uucp> tim@hoptoad.UUCP (Tim Maroney) writes: >In article <12968@dartvax.Dartmouth.EDU> earleh@eleazar.dartmouth.edu (Earle >R. Horton) writes: >> Several problems exist with this approach. The chief one is >>writing to the code resource. This is bad. It can lead to strange >>bugs on 68020 machines. >> >> There are places where stand-alone code resources can implement >>"global" variables, and not risk problems with processor caches. >>Inside of the resource containing the code is not one of them. >The processor doesn't know resources from racehorses. What it knows is >that there are lots of numbered memory locations, and it's ordered to >execute some of them. These it may cache. Others it won't, at least >not in the instruction cache. Stashing data in code space is *not* >self-modifying code. What happens on 68030 machines, which have both instruction and data caches? I've written an INIT in LSC, using A4-relative global data which I update (read: write to) when certain parameters are changed by the user through a 'cdev' interface to my patch. As far as I can tell, when my INIT code goes to fetch the value stored in one of my 'globals', the processor will use the value in the data cache if it exists there; otherwise, it will get it from the actual address. But won't altering data at a particular address cause the cached 'copy' of the data to become invalid, and force the processor to re-read the data? Or will the "old" value stored in the cache stay there, and continue to be used? Perhaps there's a way to flush the data cache? How exactly does processor data caching work? (Insert "inquiring minds..." cliche here) -- ========== ....... ============================================= Ken McLeod :. .: UUCP: ...{spsd,zardoz,felix}!dhw68k!thecloud ========== :::.. ..::: INTERNET: thecloud@dhw68k.cts.com //// =============================================