Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!amdcad!diablo!tc
From: tc@diablo.amd.com (Tom Crawford)
Newsgroups: comp.arch
Subject: Re: to graphics processor or not to graphics processor
Keywords: graphics processor
Message-ID: <25237@amdcad.AMD.COM>
Date: 15 Apr 89 18:16:37 GMT
References: <28930@apple.Apple.COM> <2565@sbcs.sunysb.edu>
Sender: news@amdcad.AMD.COM
Reply-To: tc@diablo.AMD.COM (Tom Crawford)
Distribution: usa
Organization: Advanced Micro Devices, Inc. Sunnyvale CA
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In article <2565@sbcs.sunysb.edu> rick@sbcs.sunysb.edu (Rick Spanbauer) writes:
>	a particular RISC is.  The 29000 for instance has a nice load/store
>	multiple insns + large register set that can be easily matched
>	to the page mode cycling features of dram/vram.  You can:
>
>		LOADM	128 pixels -> registers @ 40 nS/4 pixels
>		operate on pixels in registers
>		STOREM 	128 pixels -> memory @ 40 nS/4 pixels
>
They also have a set of graphics primitives (assembly language, callable
from "C") that are available *now* for the 29000.  Check it out.

				Tom Crawford
				(408) 749-5100