Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!husc6!cfa!mkraiesk
From: mkraiesk@midas.UUCP (Mark Kraieski)
Newsgroups: comp.arch
Subject: Re: Criteria for comparing RISC processors
Message-ID: <1464@cfa.cfa.harvard.EDU>
Date: 20 Apr 89 21:43:52 GMT
References: <2368@ogccse.ogc.edu>
Sender: news@cfa.harvard.EDU
Organization: Gould CSD, Fort Lauderdale, FL
Lines: 48

in article <2368@ogccse.ogc.edu>, johnr@ogccse.ogc.edu (John Roberts) says:
> 
> I'm interested in evaluation of the current crop of RISC processors based
> on some common criteria.  Here's the list of RISC processors I know about
> (feel free to add more):
...
> 
> Here's the criteria I currently use:
> 
> 	clock speed
> 	transister count
> 	on-chip floating point unit? (and/or MFlops of FPU)
> 	pipelined execution
> 	on-chip caches
> 
> I'd be interested in what criteria other silicon-groupies use for evaluating
> CPUs (especially as it relates to RISC).
> 
> John Roberts
> "hanging out at Cogent Research, Inc. and Oregon Graduate Center"
> johnr@ogccse.ogc.edu

There is another angle on the criteria that is just as important as your
items and may be the deciding factor.  I'm talking about software and
market factors:

	Availability of O/S and compilers from multiple sources.
	Mature code generators.
	Standards (source, object, binary) and conformment.
	Committment to upward compatibility (family).
	Scalability.
	Existing software base and future growth.
	Reliability in meeting delivery dates.
	Multiple vendors supplying chip.

Depending on what you plan on doing with the "hottest" RISC chip you can
find, the above issues may be important if you plan on selling it.  The
above criteria can make a chip of lower performance more attractive.


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