Path: utzoo!dptcdc!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!bloom-beacon!apple!oliveb!Ozona!chase
From: chase@Ozona.orc.olivetti.com (David Chase)
Newsgroups: comp.arch
Subject: Re: Complex Instructions
Message-ID: <40678@oliveb.olivetti.com>
Date: 18 Apr 89 21:39:45 GMT
References: <57252@yale-celray.yale.UUCP> <4101@tolerant.UUCP>
Sender: news@oliveb.olivetti.com
Reply-To: chase@Ozona.UUCP (David Chase)
Organization: Olivetti Research Center, Menlo Park, CA
Lines: 12

In article <4101@tolerant.UUCP> rob@tolerant.UUCP (Rob Kleinschmidt) writes:
>Anybody got a good way for a user execute an un-interupted sequence
>of a dozen RISC instructions ?

Saw (via cable) a talk at Stanford by one of the 80860 people from
Intel where he said (I believe) that the chip provided the ability to
do just that.  Upon examining the Programmer's Reference Manual, I
find that up to 32 user-mode instructions can be protected by a LOCK
instruction (no branching allowed, must be restartable from the LOCK
in case of traps).  That sounds like what you want.

David