Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!unmvax!ncar!ames!vsi1!wyse!mips!prls!weaver
From: weaver@prls.UUCP (Michael Weaver)
Newsgroups: comp.arch
Subject: Re: Independent Architecture Complilers
Message-ID: <21331@prls.UUCP>
Date: 21 Apr 89 17:46:43 GMT
References: <10441@polyslo.CalPoly.EDU> <424@bnr-fos.UUCP>
Reply-To: weaver@prls.UUCP (Michael Weaver)
Distribution: comp
Organization: Philips Research Labs, Sunnyvale, California
Lines: 27

In article <10441@polyslo.CalPoly.EDU> cquenel@polyslo.CalPoly.EDU (34 more school days) writes:
>
>What if your machine only runs micro-code ?  (This is not an idle
>question).  The term I've heard coined recently is "superscalar".
>If one were to write a compiler for a superscalar machine, it
>seems that one might want to design it a lot like a micro-code
>compiler.
>
>This is NOT an argument for a "retargetable" (ha ha ha ha ha) micro-code
>compiler, just a micro-code compiler.  
>

If your machine runs only microcode, it will generally be much simpler 
to generate code for it than a machine that uses microcode to implement
an instruction set. The reason for this is quite simple: in the latter 
case the hardware designers have a pretty good idea what the only program
the machine will run will look like, and may introduce some odd features
(such as OR-ing address with data to form a branch target address), if
they make the machine cheaper or faster.


Michael Weaver
Signetics/Philips Components
811 East Arques Avenue
Sunnyvale CA 94086 USA
Phone: (408) 991-3450
Usenet: ...!mips!prls!weaver