Path: utzoo!dptcdc!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!bloom-beacon!husc6!mit-eddie!apollo!kagenski From: kagenski@apollo.COM (Joe Kagenski) Newsgroups: comp.lsi Subject: Re: VHDL description wanted Message-ID: <42b4f116.56ee@apollo.COM> Date: 18 Apr 89 14:21:00 GMT References: <22@array.UUCP> <815@vector.Dallas.TX.US> Reply-To: kagenski@apollo.UUCP (Joe Kagenski) Organization: Apollo Computer, Chelmsford, MA Lines: 42 Unfortunately, there is no one good source of descriptive information on VHDL. I expect to see a few more books in the near future appearing to discuss the language and modeling techniques in general. =The bible is: IEEE Standard VHDL Language Reference Manual, IEEE IEEE Std 1076-1987 =One book already in print is: Armstrong, James. CHIP LEVEL MODELING WITH VHDL, Prentice-Hall, 1988. CALL NO. - TK 7874 .A75 1989 (this goes through some of the basics in modeling, a few holes here and there, but in general a good book) = Design&Test, April 1986 issue, IEEE (Although outdated, since it looks at the DoD versions of the language, it can be valuable in understanding some of the reasoning behind the language.) =Numerous Magazine Articles and Papers Check out the last couple years of DAC proceeding for papers. Articles have appeared in VLSI Systems Design, EDN, and other places describing the language and it uses. one article that comes to mind, discusses some basics; Behavioral Description in VHDL; Dave Barton of Intermetrics, VLSI System Design, June 1988 hope this helps joe -- Joe Kagenski -CAE Logic Design Tools * ARPA: kagenski@apollo.com (129.248.0.1) Apollo Computer Inc. * 508-256-6600 * UUCP: {decwrl!decvax, mit-eddie, attunix}!apollo!kagenski 330 Billerica Road; Chelmsford, Ma 01824 * FAX: 508-256-2384