Path: utzoo!dptcdc!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!erd From: erd@tut.cis.ohio-state.edu (Ethan R Dicks) Newsgroups: comp.sys.amiga.tech Subject: Re: Official Warnings... Message-ID: <43928@tut.cis.ohio-state.edu> Date: 18 Apr 89 05:11:12 GMT References: <3082@haven.umd.edu> <5881@ardent.UUCP> Reply-To: Ethan R Dicks Distribution: na Organization: Ohio State University Computer and Information Science Lines: 66 In article <5881@ardent.UUCP> rap@rap.ardent.com (Rob Peck) writes: >The poster referred to a warning from CATS not to use the TAS instruction. >As I remember, TAS is an instruction during which the 68000 believes >that it has the bus for the entire instruction execution time, and >effectively runs what it believes to be a Read/Modify/Write cycle. > >But the custom chips don't take too nicely to this kind of activity >and can take away the bus before the instruction can be completed. >I don't know what effect that has on the instruction or the processor, >but it can, at the very least, make the instruction suspect. > >Rob Peck To add my $.02, and add some light... On page Introduction-5 of the New (and Improved!) RKM for AmigaDOS 1.3, there is a section labeled "Additional Assembler Development Guidelines," to which the original poster probably refered... The first entry reads: o Do not use the "TAS" intruction on the Amiga. System DMA can conflict with this instruction's special indivisible read-modify-write cycle.+ I assume that this warning refers to the intended use of the TAS instruction to implement semaphores. Normally, the Assembler programmer can use the TAS to check the state of a locking bit, and then set it in an indivisible succession, to permit two processes to use a common memory location as a spinlock an not get into a race condition. For example... Process A executes a TAS on a memory location containing a 0. This will set a bit in the location as well as set the Z bit in the Processor status register. Before the next instruction of A can begin, the scheduler switches tasks and starts process B, which also executes a TAS on the same location. Because A already set the bit, the Z flag in the processor status word is *not* set for process B, telling it that it did NOT get the lock, and should try again later. The warning is intended to warn programmers that the TAS is NOT atomic in the Amiga because of the possible actions of the custon chips. Structures which are sensitive to updates from multiple processes are NOT adequately protected by the TAS mechanism. There should be no problem using the TAS instruction if the programmer does not mind having the test and set possibly interrupted. If it is used as the proginal poster intended, for setting a bit in a memory location, there should be no problem, but using the BSET instruction might be more appropriate, to avoid confusion. -ethan + Quoted from _Amiga ROM Kernal Reference Manual: Includes and Autodocs_, Copyright (C) 1989 by Commodore-Amiga, Incorporated, published by Addison-Wesley Publishing Company, Inc. Reprinted without permision. -- Ethan R. Dicks | ###### This signifies that the poster is a member in Software Results Corp| ## good sitting of Inertia House: Bodies at rest. 940 Freeway Drive N. | ## Columbus OH 43229 | ###### "You get it, you're closer."