Path: utzoo!attcan!uunet!cs.utexas.edu!tut.cis.ohio-state.edu!osu-cis!killer!usl!usl-pc!lar From: lar@usl-pc.usl.edu (Robert Lane A.) Newsgroups: comp.sys.apple Subject: Re: what is sweet 16? Message-ID: <273@usl-pc.usl.edu> Date: 16 Apr 89 19:42:39 GMT References: <1568@husc6.harvard.edu> <10183@polyslo.CalPoly.EDU> Reply-To: lar@usl.usl.edu (Robert Lane A.) Organization: Univ. of Southwestern La., Lafayette Lines: 111 In article mw22+@andrew.cmu.edu (Michael Alan Wertheim) writes: >The following is based on an assembly listing of a Sweet-16 program. I have >attempted to decipher the instruction set from the listing.... > >Unfortunately, I did all this at home and forgot to write down the entry point >to Sweet-16. (It begins with $F6....) Also, there seem to be two different >entry points to Sweet-16, and I'm not sure about the difference between the two. > One is $F689, don't know the other. [...] >Value of Example Encoding for What this >first nibble instruction this example example does >======================================================================== [...] > 4 LD @1 41 Loads accumulator with > contents of memory > word whose address > is stored in reg 1 > > 5 ST @2 52 Stores accumulator > value into the memory > word whose address > is stored in reg 2 > The above instructions load or store the low byte of the accumulator with the value of the BYTE pointed to by the contents of the memory word stored in register 'n'. Also increment register 'n' by 1. > 6 LDD @9 69 ? > > 7 STD @7 77 ? Same as instructions 4 & 5, except they load/store an entire 16-bit word into/from the accumulator. Also increment reg. 'n' by 2. > 8 Not used in the program I have POP @R8 88 Decrement R8 by 1, then load acc from R8 indirect. > 9 Not used in the program I have STP @R9 99 Decrement R9 by 1, then store acc from R9 indirect. [...] > C POPD @3 C3 ? -- Woz's program has a > few POPD instructions but > no "PUSHD" instructions. > Decrement R3 by 2, then load acc from R3 indirect. Also, there is no "PUSHD" instruction. [...] >If the first nibble of the instruction byte is 0, then the instruction is a >branch instruction, which is sometimes a 2-byte instruction. The second nibble >determines the type of branch. If needed, the an 8-bit signed offset is stored >in the second byte of the instruction. Actually, instructions with first nibble 0 are called nonregister ops, most of which are branches. >Value of Example Encoding for What this >second nibble instruction this example example does >======================================================================== > 0 RTN 00 Signifies that the > next instructions are > 6502 instructions > > 1 Not used in the program I have BR label 01 10 Branch always to label [...] > 4 Not used in the program I have BP label 04 10 Branch on plus result > 5 BM label 05 10 ? Branch on minus result > A-F Not used in the program I have A BK label 0A 10 Cause a 6502 BRK B RS 0B Return from a Sweet-16 subroutine C BS label 0C 10 Branch to a Sweet-16 subroutine Opcodes D-F are unassigned. My information comes from the book "Apple Programmer's Handbook" by Paul Irwin, published by Howard W. Sams & Co. Lane ------------------------------------------------------------------------ Lane Robert lar@usl.usl.edu ...!{killer, uunet!dalsqnt}!usl!lar University of Southwestern Louisiana Computing Center Lafayette, LA