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From: landman@SUN.COM (Howard A. Landman)
Newsgroups: sci.nanotech
Subject: Re: How big is a brain?
Message-ID: <8904220140.AA08216@aramis.rutgers.edu>
Date: 14 Apr 89 19:52:12 GMT
References: <8903230413.AA09069@athos.rutgers.edu> <8903240502.AA22884@athos.rutgers.edu> <8904131959.AA02594@athos.rutgers.edu>
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In article <8904131959.AA02594@athos.rutgers.edu> rod@VENERA.ISI.EDU (Rodney Doyle Van Meter III) writes:
>My question: my understanding of the brain and memory is poor, even by
>current standards. I think I heard, though, that short term memory is
>stored in the synapses, in electro-chemical form, and long term memory
>(learning) involved a gradual, directed rewiring of the brain. IF this
>is correct, how do the analog VLSI guys intend to manage this?

The architecture aspect of this is not trivial, but the hardware end is
probably already solved.  Just look at a spec sheet for any Xylinx
reprogrammable gate array.  Basically, you spend some hardware on
programmable crosspoint switches, and if your connectivity is well
designed, you're done.  You pay a little area and you lose some performance,
but you're still orders of magnitude faster than human neurons.

Another approach would be to use a general-purpose high-bandwidth
communications network.  This would allow anything to talk to anything,
but with routing overhead.  This is essentially what a Connection Machine
does.  The advantage is that its VERY general; you can emulate any other
network this way.  Thus, a CM is a good test bed to explore the behavior
of various architectures.  The disadvantage is that it uses digital computation
instead of device physics, and thus throws away a couple orders of magnitude
performance.

	Howard A. Landman
	landman@hanami.sun.com