Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!purdue!ames!ames.arc.nasa.gov!lamaster
From: lamaster@ames.arc.nasa.gov (Hugh LaMaster)
Newsgroups: comp.arch
Subject: Re: Virtualizable RISC Instruction Sets
Message-ID: <24898@ames.arc.nasa.gov>
Date: 3 May 89 18:19:14 GMT
References: <24844@ames.arc.nasa.gov> <30036@apple.Apple.COM>
Sender: usenet@ames.arc.nasa.gov
Organization: NASA - Ames Research Center
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In article <30036@apple.Apple.COM> baum@apple.UUCP (Allen Baum) writes:

>You've aroused my curiosity. What can you do efficiently if your arhictecture
>is virtualizable? I'm posting this instead of replying, because other people
>are probably interested as well.

I have been told by an "expert" (i.e. I don't know enough about it to say 
anything that isn't in some way misleading, so I will avoid details) that 
virtual machines are the cheapest, most effective way known, to 
produce an operating system which is secure, with capabilities at the 
process level of granularity.

You can also do it with special purpose hardware architectures, but
(invoking the history of micros in the 80's)
general purpose systems are always better if you can use them.
In general, a special purpose market 
cannot finance the R&D necessary to stay competitive when technology is 
changing rapidly.  So, the obvious answer is to  use a general purpose 
machine.  

Well, I am told that you need virtual machines in order to build secure
capabilities based systems, preferably with some sort of reasonably cheap
shared memory facility (to do reasonably inexpensive message passing).
Perhaps a net expert can enlighten us?

Anyway, to determine if an architecture is virtualizable,
you need a complete architectural definition handy. (It seems to be
non-trivial to define an architecture clearly.  Register to register
instructions are easy, of course, but when you get to interrupts, cache
coherency, restartable instructions, and combinations thereof, well...)  I
just don't have immediate access to the architectural definition of these new
micros.  

Aside: You don't often find documents like the famous
"Principles of Operation".  I will avoid making specific comments, but some
microprocessor manufacturers seem to think that an assembler manual is an
architectural definition.  In my experience, many traditional mainframe
companies have been much more painstaking about defining and documenting
their hardware architectures.  But, I haven't seen the documents for all the
current players.

  Hugh LaMaster, m/s 233-9,  UUCP ames!lamaster
  NASA Ames Research Center  ARPA lamaster@ames.arc.nasa.gov
  Moffett Field, CA 94035     
  Phone:  (415)694-6117