Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!decwrl!decvax!ima!johnl
From: johnl@ima.ima.isc.com (John R. Levine)
Newsgroups: comp.arch
Subject: Re: RISC and emulated languages
Message-ID: <3841@ima.ima.isc.com>
Date: 4 May 89 02:01:14 GMT
References: <1896@etive.ed.ac.uk>
Reply-To: johnl@ima.UUCP (John R. Levine)
Organization: Segue Software, Inc.
Lines: 22

In article <1896@etive.ed.ac.uk> sam@lfcs.ed.ac.uk (S. Manoharan) writes:
>I hear that the RISC (Berk) was designed with a view of supporting C.
>How would the register windowing help in processing C functions!

The RISC group did not presuppose a particularly good C compiler. I expect
they did their work with PCC. As a result, the fixed per-function overhead of
call and return was clearly a problem, and register windows let you make
function call and return faster without making the compiler any smarter, by
moving the normally time-consuming register save and restore into hardware.

The IBM 801 project which was looking at similar problems at about the same
time worked with some of IBM's best compiler people.  Many of their decisions
were similar to the RISC group's, e.g. fixed-length instructions that execute
in one cycle, but their register model is quite different -- they have 32
conventional registers.  They found that their compiler could do an excellent
job of register allocation at compile time, including minimizing saves across
procedure calls, so they could use the chip real estate that might have been
allocated to an enormous register file to other things.
-- 
John R. Levine, Segue Software, POB 349, Cambridge MA 02238, +1 617 492 3869
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